full adder

Design of New High-Performance Full Adder Using Hybrid-CMOS Logic Style for High-Speed Applications

This paper, presents a new design for 1 bit full adder cell using hybrid CMOS logic style Using a novel structure for implementation of the proposed…

Design and Simulation of an Improved 3-bit Multiplier using Voltage Ripple filter in CMOS Technology

In this paper, improved 3 bit multiplication arithmetic operator is proposed In order to design a basic block for this multiplier, transmission gates…

A CNTFET-based Energy-Efficient Current-Mode Full-Adder

A CNTFET-based Energy-Efficient Current-Mode Full-Adder

A CNTFET-based Energy-Efficient Current-Mode Full-Adder

A CNTFET-based Energy-Efficient Current-Mode Full-Adder